TY - GEN
T1 - Weight-Aware Activation Mapping for Energy-Efficient Convolution on PIM Arrays
AU - Jeon, Kang Eun
AU - Rhe, Johnny
AU - Bang, Hyeonsu
AU - Ko, Jong Hwan
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Convolutional weight mapping plays a stapling role in facilitating convolution operations on Processing-in-memory (PIM) architecture which is, at its essence, a matrix-vector multiplication (MVM) accelerator. Despite its importance, convolutional mapping methods are under-studied and existing mapping methods fail to exploit the sparse and redundant characteristics of heavily quantized convolutional weights, leading to low array utilization and ineffectual computations. To address these issues, this paper proposes a novel weight-aware activation mapping method where activations are mapped onto the memory cells instead of the weights. The proposed method significantly reduces the number of computing cycles by skipping zero-valued weights and merging those PIM array rows with the same weight values. Experimental results on ResNet-18 demonstrate that the proposed weight-aware activation mapping can achieve up to 90% energy saving and latency reduction compared to the conventional approaches.
AB - Convolutional weight mapping plays a stapling role in facilitating convolution operations on Processing-in-memory (PIM) architecture which is, at its essence, a matrix-vector multiplication (MVM) accelerator. Despite its importance, convolutional mapping methods are under-studied and existing mapping methods fail to exploit the sparse and redundant characteristics of heavily quantized convolutional weights, leading to low array utilization and ineffectual computations. To address these issues, this paper proposes a novel weight-aware activation mapping method where activations are mapped onto the memory cells instead of the weights. The proposed method significantly reduces the number of computing cycles by skipping zero-valued weights and merging those PIM array rows with the same weight values. Experimental results on ResNet-18 demonstrate that the proposed weight-aware activation mapping can achieve up to 90% energy saving and latency reduction compared to the conventional approaches.
UR - https://www.scopus.com/pages/publications/85173107515
U2 - 10.1109/ISLPED58423.2023.10244618
DO - 10.1109/ISLPED58423.2023.10244618
M3 - Conference contribution
AN - SCOPUS:85173107515
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
BT - 2023 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2023
Y2 - 7 August 2023 through 8 August 2023
ER -