Vertically and laterally self-aligned double layer of nanocrystals in nanopatterned dielectric layer for nanocrystal floating gate memory device

The formation of a vertically and laterally self-aligned double layer of CdSe colloidal nanocrystals (NCs) in a nanopatterned dielectric layer on Si substrate was demonstrated by a repeating dip-coating process for NC deposition and atomic layer deposition (ALD) of _Al2 O₃ layer. A nanopatterned SiO₂ /Si substrate was formed by patterning with a self-assembled diblock copolymer. After the selective deposition of the first NC layer inside the SiO2 nanopattern by dip-coating, an Al₂ O ₃ interdielectric layer and the second NC layer in the Al₂ O₃ nanopattern were sequentially deposited. The capacitance-voltage measurement of an Al-gate/ALD- Al₂ O₃ (25 nm) /second-CdSe-NCs/ ALD-Al₂ O₃ (2 nm) /first-CdSe -NCs/nanopatterned- SiO₂ (15 nm) /p-Si substrate structure showed the flatband voltage shift through the charge transport between the gate and NCs.