Unified Dynamic Library: Neural Network-Based Compact Modeling for Enhanced Efficiency

Hyunseok Whang, Donghyun Jin, Wanki Lee, Kyungjin Rim, Changsub Lee, Ye Sle Cha, Jongwook Jeon, Premkumar Vincent, Hyunbo Cho

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This study introduces the new concept of Unified Dynamic Library(UDL) to overcome existing limitations and proposes a novel method for ANN-based compact modeling. Using this method, it becomes possible to adopt the computational framework of neural networks, achieving high simulation speeds. In addition, it offers the advantage of incorporating the physical phenomenon of components into the device modeling process, such as negative differential resistance. To validate this concept, our model's accuracy and simulation speed have been compared with the direct implementation of ANN model in Verilog-A as well as the Look-Up Table model. In the transient Ring Oscillator circuit simulations, the UDL calculation achieved a speed 43 times faster than the Verilog-A-based neural network model and 389 times faster than the Look-Up Table model while sufficiently guaranteeing model accuracy.

Original languageEnglish
Title of host publicationICMC 2025 - International Compact Modeling Conference, Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331535308
DOIs
StatePublished - 2025
Externally publishedYes
Event1st International Compact Modeling Conference, ICMC 2025 - San Francisco, United States
Duration: 26 Jun 202527 Jun 2025

Publication series

NameICMC 2025 - International Compact Modeling Conference, Proceedings

Conference

Conference1st International Compact Modeling Conference, ICMC 2025
Country/TerritoryUnited States
CitySan Francisco
Period26/06/2527/06/25

Keywords

  • Artificial Neural Network
  • Compact Modeling
  • SPICE
  • Unified Dynamic Library
  • Verilog-A

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