Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric

H. J. Oh; J. Q. Lin; S. A.B. Suleiman; G. Q. Lo; D. L. Kwong; D. Z. Chi; S. J. Lee

doi:10.1109/IEDM.2009.5424354

Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric

H. J. Oh, J. Q. Lin, S. A.B. Suleiman, G. Q. Lo, D. L. Kwong, D. Z. Chi, S. J. Lee

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

10 Scopus citations

Abstract

Plasma-based PH3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-κ deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond P_xN_y layer forms at the interface during plasma PH3-passivation. We report that PxNy passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting P_xN_y passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G _m=378mS/mm at V_d=1V, and effective mobility of 2557cm2/Vs at E_eff=0.24MV/cm.

Original language	English
Title of host publication	2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest
Pages	13.6.1-13.6.4
DOIs	https://doi.org/10.1109/IEDM.2009.5424354
State	Published - 2009
Externally published	Yes
Event	2009 International Electron Devices Meeting, IEDM 2009 - Baltimore, MD, United States Duration: 7 Dec 2009 → 9 Dec 2009

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Conference

Conference	2009 International Electron Devices Meeting, IEDM 2009
Country/Territory	United States
City	Baltimore, MD
Period	7/12/09 → 9/12/09

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10.1109/IEDM.2009.5424354

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Oh, H. J., Lin, J. Q., Suleiman, S. A. B., Lo, G. Q., Kwong, D. L., Chi, D. Z., & Lee, S. J. (2009). Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric. In 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest (pp. 13.6.1-13.6.4). Article 5424354 (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2009.5424354

@inproceedings{38dfe3343d294c3abe11dc248351cb89,

title = "Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric",

abstract = "Plasma-based PH3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-κ deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond PxNy layer forms at the interface during plasma PH3-passivation. We report that PxNy passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting PxNy passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G m=378mS/mm at Vd=1V, and effective mobility of 2557cm2/Vs at Eeff=0.24MV/cm.",

author = "Oh, \{H. J.\} and Lin, \{J. Q.\} and Suleiman, \{S. A.B.\} and Lo, \{G. Q.\} and Kwong, \{D. L.\} and Chi, \{D. Z.\} and Lee, \{S. J.\}",

year = "2009",

doi = "10.1109/IEDM.2009.5424354",

language = "English",

isbn = "9781424456406",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

pages = "13.6.1--13.6.4",

booktitle = "2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest",

note = "2009 International Electron Devices Meeting, IEDM 2009 ; Conference date: 07-12-2009 Through 09-12-2009",

}

Oh, HJ, Lin, JQ, Suleiman, SAB, Lo, GQ, Kwong, DL, Chi, DZ & Lee, SJ 2009, Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric. in 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest., 5424354, Technical Digest - International Electron Devices Meeting, IEDM, pp. 13.6.1-13.6.4, 2009 International Electron Devices Meeting, IEDM 2009, Baltimore, MD, United States, 7/12/09. https://doi.org/10.1109/IEDM.2009.5424354

Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric. / Oh, H. J.; Lin, J. Q.; Suleiman, S. A.B. et al.
2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. p. 13.6.1-13.6.4 5424354 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

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AU - Oh, H. J.

AU - Lin, J. Q.

AU - Suleiman, S. A.B.

AU - Lo, G. Q.

AU - Kwong, D. L.

AU - Chi, D. Z.

AU - Lee, S. J.

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N2 - Plasma-based PH3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-κ deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond PxNy layer forms at the interface during plasma PH3-passivation. We report that PxNy passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting PxNy passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G m=378mS/mm at Vd=1V, and effective mobility of 2557cm2/Vs at Eeff=0.24MV/cm.

AB - Plasma-based PH3 passivation technique is extensively studied for the surface passivation of InGaAs substrate prior to high-κ deposition. The comparative analysis reveals that the striking improvement is achieved when a stable covalent-bond PxNy layer forms at the interface during plasma PH3-passivation. We report that PxNy passivation layer improves thermal stability of high-k/InGaAs gate stack up to 750°C, which enables successful implementation of InGaAs MOSFETs by self-aligned gate-first process. By adopting PxNy passivation on InGaAs with MOCVD HfAlO and metal gate stack, we achieved subthreshold slope of 98mV/dec, G m=378mS/mm at Vd=1V, and effective mobility of 2557cm2/Vs at Eeff=0.24MV/cm.

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M3 - Conference contribution

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T3 - Technical Digest - International Electron Devices Meeting, IEDM

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BT - 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest

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ER -

Oh HJ, Lin JQ, Suleiman SAB, Lo GQ, Kwong DL, Chi DZ et al. Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric. In 2009 International Electron Devices Meeting, IEDM 2009 - Technical Digest. 2009. p. 13.6.1-13.6.4. 5424354. (Technical Digest - International Electron Devices Meeting, IEDM). doi: 10.1109/IEDM.2009.5424354

Thermally robust phosphorous nitride interface passivation for InGaAs self-aligned gate-first n-MOSFET integrated with high-k dielectric

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