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The efficacy of metal-interfacial layer-semiconductor source/drain structure on sub-10-nm n-type ge FinFET performances

  • Jeong Kyu Kim
  • , Gwang Sik Kim
  • , Hyohyun Nam
  • , Changhwan Shin
  • , Jin Hong Park
  • , Jong Kook Kim
  • , Byung Jin Cho
  • , Krishna C. Saraswat
  • , Hyun Yong Yu
  • Korea University
  • University of Seoul
  • Korea Advanced Institute of Science and Technology
  • Stanford University

Research output: Contribution to journalArticlepeer-review

Abstract

We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n+-IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal-semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, the M-I-S S/D structure with n+-IL provides much lower contact resistivity, resulting in ~5 × lower contact resistivity than 1 × 10-8 Ω-cm2, specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n+-IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.

Original languageEnglish
Article number6936878
Pages (from-to)1185-1187
Number of pages3
JournalIEEE Electron Device Letters
Volume35
Issue number12
DOIs
StatePublished - 1 Dec 2014

Keywords

  • CMOS
  • contact resistance
  • FinFET
  • germanium
  • interfacial layer
  • MOSFET
  • source/drain

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