SuperSFQ: A Hardware Design to Realize High-Frequency Superconducting Processors

Superconducting computing using single flux quantum (SFQ) technology has been recognized as a promising post-Moore's law era technology thanks to its extremely low power and high performance. Therefore, many researchers have proposed various SFQ-based circuits (e.g., ALU, register file) and architectures (e.g., NPU, CPU) to exploit the potential. However, due to the absence of a reliable and high-frequency clocking scheme, general SFQ circuits cannot operate at high frequencies, making all architectural efforts for high-performance SFQ computing ineffective. In this paper, we propose SuperSFQ, a new design methodology for SFQ hardware that unlocks the high-frequency potential of SFQ technology by co-designing the clocking scheme, circuitry, and architecture. First, we propose SuperClocking, a new clocking scheme that enables high frequency in general SFQ hardware. Second, we implement an SFQ-based synchronizer to realize the reliable operation of SuperClocking. Finally, we provide two architectural design guidelines and corresponding solutions to ensure the functional correctness of SuperClocking in general SFQ devices. By applying our clocking scheme, synchronizer, and guidelines to the latest general-purpose SFQ CPU, SuperSFQ achieves up to 62.5 times higher frequency and improves single-thread and multi-thread performance by 17 and 62.5 times, respectively, compared to conventional designs, with only 34.4% Josephson junction overhead. In addition, to demonstrate the generality of SuperSFQ, we apply SuperSFQ to 48 different benchmark circuits, achieving 88.5 times higher frequency compared to conventional designs, on average.