Storage architecture and software support for SLC/MLC combined flash memory

We propose a novel flash memory management software for SLC/MLC combined flash memories which are recently introduced to provide flexible and cost-efficient embedded storage systems. To provide a fast and large capacity of flash memory, the proposed scheme utilizes the SLC area as log buffer and the MLC area as data block. Considering the high write cost of MLC flash, the garbage collection for the SLC log buffer moves a page into the MLC data block only when the page is cold or the page invokes a small migration cost. We also propose the bypassing technique which sends a large sequential data into the MLC flash directly not through the SLC log buffer. From the experiments, we can know that the proposed scheme utilizes the SLC log buffer effectively providing better performance compared with the previous flash management schemes for the SLC/MLC combined flash.