Steep-Switching Memory FET for Noise-Resistant Reservoir Computing System

Most physical reservoir computing (RC) systems require complex preprocessing steps such as binarization under noise-free conditions and challenging real-time data processing because of latency and increase system complexity. This paper proposes a noise-resistant RC system that reduces the necessity for preprocessing by utilizing a steep-switching memory FET. The proposed device achieved steep-switching characteristics (SS_PGM = 19 mV dec⁻¹, SS_ERS = 23 mV dec⁻¹) by operating in a stable state for a negative capacitance, which is established through the gate-stack of a ferroelectric insulator (CuInP₂S₆) and an insulator (h-BN). Additionally, it shows wide hysteresis (4.72 V) through dipole coupling between CuInP₂S₆ and ferroelectric semiconductor (α-In₂Se₃). Sub-60 mV dec⁻¹ characteristics reduce the probability of undefined reservoir state occurrences and demonstrate the ability to filter noisy signals without additional preprocessing. Furthermore, its wide hysteresis-based memory enables non-linear transformations that incorporate temporal information from input signals, facilitating complex tasks such as temporal signal classification. A noise-resistant RC system is developed using steep-switching memory FET and validate its performance using noisy MNIST (15 dB: 95.9%, noise-free: 96.3%) and speech recognition (15 dB: 86.0%, noise-free: 86.7%) tasks, satisfying international noise-tolerance standards. This study highlights the potential of enhancing real-time data processing and system operating efficiency for data-centric computing systems.