TY - GEN
T1 - SLC
T2 - 38th European Solid State Circuits Conference, ESSCIRC 2012
AU - Kim, Yejoong
AU - Lee, Yoonmyung
AU - Sylvester, Dennis
AU - Blaauw, David
PY - 2012
Y1 - 2012
N2 - Ultra-low voltage design makes signal level conversion a critical component in modern low power designs. This paper proposes a static level converter operating in the subthreshold regime, called SLC (Split-control Level Converter). Using a novel circuit structure, SLC effectively eliminates the high leakage and short circuit currents in previous approaches. Designed for 300mV to 2.5V conversion and fabricated in 130nm CMOS, measured results show 2.3×, 9.9×, and 5.9× improvements over conventional DCVS structures in delay, static power, and energy per transition, respectively. Even with the smallest area among wide-range level converters, it also has 5.2× smaller standard deviation in delay and only 5.6% change in FO4 delay with 10% VDDL drop, demonstrating robustness.
AB - Ultra-low voltage design makes signal level conversion a critical component in modern low power designs. This paper proposes a static level converter operating in the subthreshold regime, called SLC (Split-control Level Converter). Using a novel circuit structure, SLC effectively eliminates the high leakage and short circuit currents in previous approaches. Designed for 300mV to 2.5V conversion and fabricated in 130nm CMOS, measured results show 2.3×, 9.9×, and 5.9× improvements over conventional DCVS structures in delay, static power, and energy per transition, respectively. Even with the smallest area among wide-range level converters, it also has 5.2× smaller standard deviation in delay and only 5.6% change in FO4 delay with 10% VDDL drop, demonstrating robustness.
UR - https://www.scopus.com/pages/publications/84870842265
U2 - 10.1109/ESSCIRC.2012.6341359
DO - 10.1109/ESSCIRC.2012.6341359
M3 - Conference contribution
AN - SCOPUS:84870842265
SN - 9781467322126
T3 - European Solid-State Circuits Conference
SP - 478
EP - 481
BT - 2012 Proceedings of the European Solid State Circuits Conference, ESSCIRC 2012
Y2 - 17 September 2012 through 21 September 2012
ER -