Simultaneous reverse body and negative word-line biasing control scheme for leakage reduction of DRAM

In this paper, a simultaneous body and word-line biasing control scheme is described for minimizing the cell leakage current in DRAMs. In the proposed biasing scheme, both the reverse body and negative word-line bias voltages are simultaneously controlled in real time by monitoring the leakage current of a group of replica DRAM cells in different leakage conditions. Experimental results in a 46 nm DRAM technology indicated that the data retention time provided by the proposed scheme is improved by up to 60% as compared to the conventional fixed biasing scheme. They also indicated that the number of failure bits of a DRAM array was substantially reduced by adopting the proposed scheme.