@inproceedings{c74d63f2a10b47658b09f8e260bdfe8f,
title = "Signal Integrity Enhancement of Die-to-Die Interconnection by Using a Vertically Asymmetric Pattern",
abstract = "Enhancing signal integrity (SI) in high-speed die-to-die interconnections is crucial to ensure stable and reliable system performance. Interconnection structures influence insertion loss (IL) and crosstalk performance, and the structural optimization is essential in improving SI. To address these challenges, this study proposes a vertically asymmetric pattern for die-to-die interconnections. The proposed design repositions the traces to mitigate SI degradation. Frequency domain analysis using Ansys HFSS demonstrates a significant improvement in IL, meanwhile time domain analysis shows a 36. 8\% improvement in the worst-case eye diagram Rx mask width. These findings validate the effectiveness of the proposed design in improving SI and advancing the development of high-speed die-to-die interconnections.",
keywords = "Die-to-die interconnection, eye diagram, far end crosstalk, insertion loss, signal integrity",
author = "Jaewon Lee and Kihun Ok and Kim, \{So Young\}",
note = "Publisher Copyright: {\textcopyright} 2025 Japan Institute of Electronics Packaging.; 24th International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2025 ; Conference date: 15-04-2025 Through 19-04-2025",
year = "2025",
doi = "10.23919/ICEP-IAAC64884.2025.11002962",
language = "English",
series = "2025 International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2025",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "277--278",
booktitle = "2025 International Conference on Electronics Packaging and iMAPS All Asia Conference, ICEP-IAAC 2025",
}