Self-resetting level-conversion flip-flops with direct output feedback for dual-supply SoCs

This paper describes novel CMOS level-conversion flipflops for use in low-power SoCs with clustered voltage scaling. These flipflops feed outputs directly into the front stage to support self-resetting and conditional operations. They thus have simple structures to avoid clocklevel shifting and redundant transitions, leading to substantial improvements in terms of power and area. The comparison results indicate that the proposed level-conversion flip-flops achieve power and area savings up to 50% and 31%, respectively, with no speed degradation as compared toconventional level-conversion flip-flops.