Abstract
In this brief, a self-calibrated two-point delta-sigma modulation technique for a CMOS RF transmitter is proposed for use for a voltage-controlled oscillator (VCO) and a delta-sigma modulator in a frequency synthesizer. By using the counter to calibrate the frequency deviation of two-point modulation to the desired value, the gain mismatch between two paths can be completely calibrated by modifying the gain of the VCO path. The frequency modulation therefore guarantees a robust performance against PVT variations without using any additional circuit. This technique is applied to Bluetooth Low Energy (BLE) applications. The proposed Two-Point Modulation achieves error vector magnitude (EVM) of-29.3 dB at 1 Mbps and is implemented in 55 nm CMOS process technology. The area of the chip is 0.28 mm2 and its power consumption is 2.9 mW.
| Original language | English |
|---|---|
| Pages (from-to) | 4739-4743 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 69 |
| Issue number | 12 |
| DOIs | |
| State | Published - 1 Dec 2022 |
Keywords
- CMOS
- delta-sigma modulation
- transmitter
- two-point modulation
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