Scaled-down reference switching scheme for low-power SAR ADCs

Seung Uk Baek; Se Won Lee; Kang Yoon Lee; Minjae Lee

doi:10.1007/s10470-018-1279-1

Scaled-down reference switching scheme for low-power SAR ADCs

Seung Uk Baek
, Se Won Lee
, Kang Yoon Lee
, Minjae Lee

Department of Electronic and Electrical Engineering

Gwangju Institute of Science and Technology

Research output: Contribution to journal › Article › peer-review

2 Scopus citations

Abstract

An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (V_ref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50% compared to the conventional structure.

Original language	English
Pages (from-to)	143-148
Number of pages	6
Journal	Analog Integrated Circuits and Signal Processing
Volume	97
Issue number	1
DOIs	https://doi.org/10.1007/s10470-018-1279-1
State	Published - 1 Oct 2018

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

Keywords

Capacitor switching energy
CDAC
SAR ADC

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10.1007/s10470-018-1279-1

Cite this

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title = "Scaled-down reference switching scheme for low-power SAR ADCs",

abstract = "An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (Vref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61\% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50\% compared to the conventional structure.",

keywords = "Capacitor switching energy, CDAC, SAR ADC",

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doi = "10.1007/s10470-018-1279-1",

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AU - Baek, Seung Uk

AU - Lee, Se Won

AU - Lee, Kang Yoon

AU - Lee, Minjae

PY - 2018/10/1

Y1 - 2018/10/1

N2 - An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (Vref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50% compared to the conventional structure.

AB - An energy-efficient scaled-down reference (SDR) digital-to-analogue converter switching sequence is presented for a low-power successive approximation register analogue-to-digital converter. Owing to the fact that the proposed technique utilizes only a quarter of the capacitor array for input sampling, an SDR (Vref/4) and ground (Gnd) for the same input are required for conversion cycles, which achieve reduced switching energy and high linearity. The SDR switching structure improves the efficiency of average switching energy by 99.61% and reduces the total number of required capacitors in the digital-to-analogue converter arrays by 50% compared to the conventional structure.

KW - Capacitor switching energy

KW - CDAC

KW - SAR ADC

UR - https://www.scopus.com/pages/publications/85052519581

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JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 1

ER -

Scaled-down reference switching scheme for low-power SAR ADCs

Abstract

UN SDGs

Keywords

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