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Scalable interconnection and integration of nanowire devices without registration

  • Song Jin
  • , Dongmok Whang
  • , Michael C. McAlpine
  • , Robin S. Friedman
  • , Yue Wu
  • , Charles M. Lieber
  • Harvard University

Research output: Contribution to journalArticlepeer-review

Abstract

A general strategy for the parallel and scalable integration of nanowire devices over large areas without the need to register individual nanowire-electrode interconnects has been developed. The approach was implemented using a Langmuir-Blodgett method to organize nanowires with controlled alignment and spacing over large areas and photolithography to define interconnects. Centimeter-scale arrays containing thousands of single silicon nanowire field-effect transistors were fabricated in this way and were shown to exhibit both high performance with unprecedented reproducibility and scalability to at least the 100-nm level. Moreover, scalable device characteristics were demonstrated by interconnecting a controlled number of nanowires per transistor in "pixel-like" device arrays. The general applicability of this approach to other nanowire and nanotube building blocks could enable the assembly, interconnection, and integration of a broad range of functional nanosystems.

Original languageEnglish
Pages (from-to)915-919
Number of pages5
JournalNano Letters
Volume4
Issue number5
DOIs
StatePublished - May 2004
Externally publishedYes

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