Revisiting the role of oxidation in stable and high-performance lead-free perovskite-IGZO junction field-effect transistors

Mitigating the oxidation susceptibility of Sn remains a critical issue for improving the environmental stability of lead-free perovskites. Herein, we show that the oxidized surface layer of Sn-based perovskites can be utilized to improve transistor performance, rather than being entirely suppressed. We report perovskite-IGZO junction field-effect transistors that use this oxidized layer to suppress gate current to below 10⁻¹⁰ A, enabling enhancement-mode operation. We refer to these as barriered junction field-effect transistors. The combination of the gate leakage suppression and high polarizability of the perovskite layer results in a field-effect mobility of 29.4 cm²V⁻¹s⁻¹, subthreshold swing of 67.1 mV dec⁻¹, and on/off current ratio exceeding 10⁵ under ≤1 V operation. These devices maintain stable operation in ambient conditions. Furthermore, we demonstrate their applicability by constructing logic gates such as NOT, NOR and NAND. These findings highlight the potential of exploiting Sn-based perovskite oxidation to advance electronic devices.