Real-time stereo vision system using FPGA for mobile robots

Field Programmable Gate Array devices (FPGAs) are attractive for implementing computer vision algorithms, thus offering substantial speed improvements over hardware/software systems. Stereo vision has traditionally been, and continues to be, one of the most heavily investigated topics in computer vision. However, it is sometimes hard to gauge progress in the field, as most researchers only report qualitative results on the performance of their algorithms. Nevertheless, It has substantial constraints that implementing this algorithm on FPGAs level. Our system has 3-step processes that are called pre-process, disparity calculation and post-process. Pre-process is increasing the reliability and speed in the disparity computing process. Disparity calculation is suitable by FPGAs. And postprocess is increasing the reliability.