Real-time Normalization and Gaussian Convolution Module on FPGA

Jin Young Byun; Jae Wook Jeon

doi:10.1109/ICCE-Asia49877.2020.9277410

Real-time Normalization and Gaussian Convolution Module on FPGA

Jin Young Byun
, Jae Wook Jeon

Department of Semiconductor Systems Engineering

Sungkyunkwan University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Several neural network technologies are currently being studied, but their training and execution speeds are still an issue. This paper presents a method for implementing a normalization and Gaussian convolution module on FPGA to accelerate the deep learning process in real-time.

Original language	English
Title of host publication	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781728161648
DOIs	https://doi.org/10.1109/ICCE-Asia49877.2020.9277410
State	Published - 1 Nov 2020
Event	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020 - Seoul, Korea, Republic of Duration: 1 Nov 2020 → 3 Nov 2020

Publication series

Name	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020

Conference

Conference	2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020
Country/Territory	Korea, Republic of
City	Seoul
Period	1/11/20 → 3/11/20

Keywords

Gaussian convolution
Normalization

Access to Document

10.1109/ICCE-Asia49877.2020.9277410

Cite this

Byun, J. Y., & Jeon, J. W. (2020). Real-time Normalization and Gaussian Convolution Module on FPGA. In 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020 Article 9277410 (2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE-Asia49877.2020.9277410

@inproceedings{8ddad9783e0d46e099453ebb24be6a10,

title = "Real-time Normalization and Gaussian Convolution Module on FPGA",

abstract = "Several neural network technologies are currently being studied, but their training and execution speeds are still an issue. This paper presents a method for implementing a normalization and Gaussian convolution module on FPGA to accelerate the deep learning process in real-time.",

keywords = "Gaussian convolution, Normalization",

author = "Byun, \{Jin Young\} and Jeon, \{Jae Wook\}",

note = "Publisher Copyright: {\textcopyright} 2020 IEEE.; 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020 ; Conference date: 01-11-2020 Through 03-11-2020",

year = "2020",

month = nov,

day = "1",

doi = "10.1109/ICCE-Asia49877.2020.9277410",

language = "English",

series = "2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020",

}

Byun, JY & Jeon, JW 2020, Real-time Normalization and Gaussian Convolution Module on FPGA. in 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020., 9277410, 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020, Institute of Electrical and Electronics Engineers Inc., 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020, Seoul, Korea, Republic of, 1/11/20. https://doi.org/10.1109/ICCE-Asia49877.2020.9277410

Real-time Normalization and Gaussian Convolution Module on FPGA. / Byun, Jin Young; Jeon, Jae Wook.
2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020. Institute of Electrical and Electronics Engineers Inc., 2020. 9277410 (2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Real-time Normalization and Gaussian Convolution Module on FPGA

AU - Byun, Jin Young

AU - Jeon, Jae Wook

PY - 2020/11/1

Y1 - 2020/11/1

N2 - Several neural network technologies are currently being studied, but their training and execution speeds are still an issue. This paper presents a method for implementing a normalization and Gaussian convolution module on FPGA to accelerate the deep learning process in real-time.

AB - Several neural network technologies are currently being studied, but their training and execution speeds are still an issue. This paper presents a method for implementing a normalization and Gaussian convolution module on FPGA to accelerate the deep learning process in real-time.

KW - Gaussian convolution

KW - Normalization

UR - https://www.scopus.com/pages/publications/85098875993

U2 - 10.1109/ICCE-Asia49877.2020.9277410

DO - 10.1109/ICCE-Asia49877.2020.9277410

M3 - Conference contribution

AN - SCOPUS:85098875993

T3 - 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020

BT - 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2020 IEEE International Conference on Consumer Electronics - Asia, ICCE-Asia 2020

Y2 - 1 November 2020 through 3 November 2020

ER -

Real-time Normalization and Gaussian Convolution Module on FPGA

Abstract

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Keywords

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