Pulse-biased etching of Si₃N₄ Layer in Capacitively-Coupled Plasmas for Nano-Scale Patterning of Multi-Level Resist Structures

Pulse-biased plasma etching of various dielectric layers is investigated for patterning nano-scale, multi-level resist (MLR) structures composed of multiple layers via dual-frequency, capacitivelycoupled plasmas (CCPs). We compare the effects of pulse and continuous-wave (CW) biasing on the etch characteristics of a Si₃N₄ layer in CF₄/CH₂F₂/O₂/Aretch chemistries using a dual-frequency, superimposed CCP system. Pulse-biasing conditions using a low-frequency power source of 2 MHz were varied by controlling duty ratio, period time, power, and the gas flow ratio in the plasmas generated by the 27.12 MHz high-frequency power source. Application of pulse-biased plasma etching significantly affected the surface chemistry of the etched Si₃N₄ surfaces, and thus modified the etching characteristics of the Si₃N₄ layer. Pulse-biased etching was successfully applied to patterning of the nano-scale line and space pattern of Si₃N₄ in the MLR structure of KrF photoresist/bottom anti-reflected coating/SiO2/amorphous carbon layer/Si₃N₄. Pulse-biased etching is useful for tuning the patterning of nano-scale dielectric hard-mask layers in MLR structures.