TY - GEN
T1 - Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
AU - Shin, Dongkun
AU - Kim, Jihong
N1 - Publisher Copyright:
© 2003 ACM.
PY - 2003
Y1 - 2003
N2 - We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle conditional task graphs (CTGs) which model more complex precedence constraints. We first propose a condition-unaware task scheduling algorithm integrating the task ordering algorithm for CTGs and the task stretching algorithm for unconditional task graphs. We then describe a condition-aware task scheduling algorithm which assigns to each task the start time and the clock speed, taking account of the condition matching and task execution profiles. Experimental results show that the proposed condition-aware task scheduling algorithm can reduce the energy consumption by 50% on average over the non-DVS task scheduling algorithm.
AB - We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle conditional task graphs (CTGs) which model more complex precedence constraints. We first propose a condition-unaware task scheduling algorithm integrating the task ordering algorithm for CTGs and the task stretching algorithm for unconditional task graphs. We then describe a condition-aware task scheduling algorithm which assigns to each task the start time and the clock speed, taking account of the condition matching and task execution profiles. Experimental results show that the proposed condition-aware task scheduling algorithm can reduce the energy consumption by 50% on average over the non-DVS task scheduling algorithm.
KW - Algorithm design and analysis
KW - Clocks
KW - Computer science
KW - Dynamic voltage scaling
KW - Energy consumption
KW - Multiprocessing systems
KW - Power engineering and energy
KW - Real time systems
KW - Scheduling algorithm
KW - Voltage control
UR - https://www.scopus.com/pages/publications/1542329196
U2 - 10.1109/LPE.2003.1231938
DO - 10.1109/LPE.2003.1231938
M3 - Conference contribution
AN - SCOPUS:1542329196
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 408
EP - 413
BT - ISLPED 2003 - Proceedings of the 2003 International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2003 International Symposium on Low Power Electronics and Design, ISLPED 2003
Y2 - 25 August 2003 through 27 August 2003
ER -