Poly-silicon thin-film transistors without active layer pattern for high current performance with large operational range

We report the effect of thin-film transistors (TFTs) without an active pattern (TFTs w/o an active pattern) on the improvement of the drain current and on the reduction of the drain-induced barrier lowering (DIBL) effect. The electrical characteristics of TFTs w/o an active pattern are immensely different from those of normal TFTs because they are composed of a channel area with wholly preserved excimer laser annealing processed poly-silicon (poly-Si) and a specially designed gate electrode. An un-etched poly-Si layer can be utilized as a channel region by designing the gate metal. The extended electric field following the shape of the gate electrode increases the drain current by six to seven times compared to that of normal TFTs. Furthermore, the extended channel area can reduce the DIBL effect considerably. Since the un-etched poly-Si layer has no sharp slope angles or tips on the edge of the precursor, TFTs w/o an active pattern are highly resistant to breakdowns of the gate insulator. Finally, the reducing photo-lithography process on the precursor layers of TFTs effectively simplifies back-plane fabrication.