Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack

Jianqiang Lin; Sungjoo Lee; Hoon Jung Oh; Weifeng Yang; G. Q. Lo; D. L. Kwong; D. Z. Chi

doi:10.1109/IEDM.2008.4796705

Plasma PH₃-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO₂/TaN gate stack

Jianqiang Lin
, Sungjoo Lee
, Hoon Jung Oh
, Weifeng Yang
, G. Q. Lo
, D. L. Kwong
, D. Z. Chi

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

27 Scopus citations

Abstract

N-type InGaAs MOS devices are fabricated using HfO₂/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH ₃ surface passivation are compared. The PH₃-passivated MOS capacitances shows high performance with EOT=1.7∼3.0 nm, J _g=2x10^-5 A/cm² at V_g=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3%. Silicon implanted InGaAs achieves good n⁺-p rectifying characteristic and low resistivity in the n⁺ S/D by 600 °C RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH₃-passivation. It shows an excellent S.S.=96 mV/dec and μ_eff=1600 cm²/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.

Original language	English
Title of host publication	2008 IEEE International Electron Devices Meeting, IEDM 2008
DOIs	https://doi.org/10.1109/IEDM.2008.4796705
State	Published - 2008
Externally published	Yes
Event	2008 IEEE International Electron Devices Meeting, IEDM 2008 - San Francisco, CA, United States Duration: 15 Dec 2008 → 17 Dec 2008

Publication series

Name	Technical Digest - International Electron Devices Meeting, IEDM
ISSN (Print)	0163-1918

Conference

Conference	2008 IEEE International Electron Devices Meeting, IEDM 2008
Country/Territory	United States
City	San Francisco, CA
Period	15/12/08 → 17/12/08

Access to Document

10.1109/IEDM.2008.4796705

Cite this

Lin, J., Lee, S., Oh, H. J., Yang, W., Lo, G. Q., Kwong, D. L., & Chi, D. Z. (2008). Plasma PH₃-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO₂/TaN gate stack. In 2008 IEEE International Electron Devices Meeting, IEDM 2008 Article 4796705 (Technical Digest - International Electron Devices Meeting, IEDM). https://doi.org/10.1109/IEDM.2008.4796705

@inproceedings{aff3f3c91d764d2aadaa96685b5d1b34,

title = "Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack",

abstract = "N-type InGaAs MOS devices are fabricated using HfO2/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH 3 surface passivation are compared. The PH3-passivated MOS capacitances shows high performance with EOT=1.7∼3.0 nm, J g=2x10-5 A/cm2 at Vg=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3\%. Silicon implanted InGaAs achieves good n+-p rectifying characteristic and low resistivity in the n+ S/D by 600 °C RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH3-passivation. It shows an excellent S.S.=96 mV/dec and μeff=1600 cm2/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.",

author = "Jianqiang Lin and Sungjoo Lee and Oh, \{Hoon Jung\} and Weifeng Yang and Lo, \{G. Q.\} and Kwong, \{D. L.\} and Chi, \{D. Z.\}",

year = "2008",

doi = "10.1109/IEDM.2008.4796705",

language = "English",

isbn = "9781424423781",

series = "Technical Digest - International Electron Devices Meeting, IEDM",

booktitle = "2008 IEEE International Electron Devices Meeting, IEDM 2008",

note = "2008 IEEE International Electron Devices Meeting, IEDM 2008 ; Conference date: 15-12-2008 Through 17-12-2008",

}

Lin, J, Lee, S, Oh, HJ, Yang, W, Lo, GQ, Kwong, DL & Chi, DZ 2008, Plasma PH₃-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO₂/TaN gate stack. in 2008 IEEE International Electron Devices Meeting, IEDM 2008., 4796705, Technical Digest - International Electron Devices Meeting, IEDM, 2008 IEEE International Electron Devices Meeting, IEDM 2008, San Francisco, CA, United States, 15/12/08. https://doi.org/10.1109/IEDM.2008.4796705

Plasma PH₃-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO₂/TaN gate stack. / Lin, Jianqiang; Lee, Sungjoo; Oh, Hoon Jung et al.
2008 IEEE International Electron Devices Meeting, IEDM 2008. 2008. 4796705 (Technical Digest - International Electron Devices Meeting, IEDM).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - Plasma PH3-passivated high mobility inversion InGaAs MOSFET fabricated with self-aligned gate-first process and HfO2/TaN gate stack

AU - Lin, Jianqiang

AU - Lee, Sungjoo

AU - Oh, Hoon Jung

AU - Yang, Weifeng

AU - Lo, G. Q.

AU - Kwong, D. L.

AU - Chi, D. Z.

PY - 2008

Y1 - 2008

N2 - N-type InGaAs MOS devices are fabricated using HfO2/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH 3 surface passivation are compared. The PH3-passivated MOS capacitances shows high performance with EOT=1.7∼3.0 nm, J g=2x10-5 A/cm2 at Vg=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3%. Silicon implanted InGaAs achieves good n+-p rectifying characteristic and low resistivity in the n+ S/D by 600 °C RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH3-passivation. It shows an excellent S.S.=96 mV/dec and μeff=1600 cm2/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.

AB - N-type InGaAs MOS devices are fabricated using HfO2/TaN and HfAlO/TaN gate stacks. Both direct deposition and novel in-situ plasma PH 3 surface passivation are compared. The PH3-passivated MOS capacitances shows high performance with EOT=1.7∼3.0 nm, J g=2x10-5 A/cm2 at Vg=2 V. After RTA, gate stack maintains stable with excellent C-V frequency dispersion of 1.3%. Silicon implanted InGaAs achieves good n+-p rectifying characteristic and low resistivity in the n+ S/D by 600 °C RTA. Inversion-mode nMOSFET exhibits remarkable enhancement with the PH3-passivation. It shows an excellent S.S.=96 mV/dec and μeff=1600 cm2/Vs. There is significant reduction in S.S. and leap in drain current comparing to the recent reported inversion-mode III-V MOSFET and unpassivated control samples. In addition, sub 100 nm InGaAs MOSFET with the self-aligned gate-first process is demonstrated for the first time.

UR - https://www.scopus.com/pages/publications/64549118164

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DO - 10.1109/IEDM.2008.4796705

M3 - Conference contribution

AN - SCOPUS:64549118164

SN - 9781424423781

T3 - Technical Digest - International Electron Devices Meeting, IEDM

BT - 2008 IEEE International Electron Devices Meeting, IEDM 2008

T2 - 2008 IEEE International Electron Devices Meeting, IEDM 2008

Y2 - 15 December 2008 through 17 December 2008

ER -