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Package yield enhancement using machine learning in semiconductor manufacturing

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

The production difficulty of the DRAM family has rapidly increasing. Several factors can be adduced to explain. For example, increasing of step in the production process by the miniaturization of semiconductor process, challenges of Low-power designed due to the growth of mobile family. And the two are connected by a combination of the result. It may increase the difficulty of an analysis of the test area for the yield improvement. This study analyzed the Fab measurement Data, Wafer Test Data, Package Test Data and looked at Package Yield Improvement. It covered Data pre-processing, Feature Selection, and then verify the relevant data, to derive an optimized relationship, and the actual production process applied too.

Original languageEnglish
Title of host publicationProceedings of 2015 IEEE Advanced Information Technology, Electronic and Automation Control Conference, IAEAC 2015
EditorsBing Xu
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages316-320
Number of pages5
ISBN (Electronic)9781479919796
DOIs
StatePublished - 7 Mar 2016
EventIEEE Advanced Information Technology, Electronic and Automation Control Conference, IAEAC 2015 - Chongqing, China
Duration: 19 Dec 201520 Dec 2015

Publication series

NameProceedings of 2015 IEEE Advanced Information Technology, Electronic and Automation Control Conference, IAEAC 2015

Conference

ConferenceIEEE Advanced Information Technology, Electronic and Automation Control Conference, IAEAC 2015
Country/TerritoryChina
CityChongqing
Period19/12/1520/12/15

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 9 - Industry, Innovation, and Infrastructure
    SDG 9 Industry, Innovation, and Infrastructure

Keywords

  • Feature Selection
  • High Speed Test
  • Machine Learning
  • Package Yield
  • Yield Prediction

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