On-chip interconnect inductance - friend or foe

  • S. Simon Wong
  • , Patrick Yue
  • , Richard Chang
  • , So Young Kim
  • , Bendik Kleveland
  • , Frank O'Mahony

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Inductance associated with on-chip wires can no longer be ignored as chip operation frequencies increase into GHz regime. Because the magnetic field propagates a very long range, the extraction of wire inductance is not just dependent on the immediate neighboring environment. This paper discusses the various difficulties of extracting inductance of randomly placed wires in a typical chip environment. With dedicated return path, the wire inductance can be controlled and benefit the design of high-speed circuits. Specific examples are illustrated.

Original languageEnglish
Title of host publicationProceedings of the 2003 4th International Symposium on Quality Electronic Design, ISQED 2003
PublisherIEEE Computer Society
Pages389-394
Number of pages6
ISBN (Electronic)0769518818
DOIs
StatePublished - 2003
Externally publishedYes
Event2003 4th International Symposium on Quality Electronic Design, ISQED 2003 - San Jose, United States
Duration: 24 Mar 200326 Mar 2003

Publication series

NameProceedings - International Symposium on Quality Electronic Design, ISQED
Volume2003-January
ISSN (Print)1948-3287
ISSN (Electronic)1948-3295

Conference

Conference2003 4th International Symposium on Quality Electronic Design, ISQED 2003
Country/TerritoryUnited States
CitySan Jose
Period24/03/0326/03/03

Keywords

  • Capacitance
  • Circuit simulation
  • Data mining
  • Frequency
  • Inductance
  • Integrated circuit interconnections
  • Magnetic fields
  • System-on-a-chip
  • Testing
  • Wire

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