Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching

C. Y. Kang; C. Park; B. J. Park; K. S. Min; G. Y. Yeom; P. D. Kirsch; R. Jammy

doi:10.1109/VTSA.2011.5872241

Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching

C. Y. Kang, C. Park, B. J. Park, K. S. Min, G. Y. Yeom, P. D. Kirsch, R. Jammy

Department of Advanced Materials Science and Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

Metal gate/high-k LSTP CMOSFETs for sub-32nm technology was demonstrated using a novel-damage free neutral beam-assisted atomic etching process. Due to its neutralized atomic flux and chemical reaction, it had a high etch selectivity, oxygen concentration control and improved device performance /reliability. NBALE is a key process for reducing GIDL and I_off control which is a key factor for LSTP.

Original language	English
Title of host publication	Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011
Pages	80-81
Number of pages	2
DOIs	https://doi.org/10.1109/VTSA.2011.5872241
State	Published - 2011
Event	2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011 - Hsinchu, Taiwan, Province of China Duration: 25 Apr 2011 → 27 Apr 2011

Publication series

Name	International Symposium on VLSI Technology, Systems, and Applications, Proceedings

Conference

Conference	2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011
Country/Territory	Taiwan, Province of China
City	Hsinchu
Period	25/04/11 → 27/04/11

Access to Document

10.1109/VTSA.2011.5872241

Cite this

Kang, C. Y., Park, C., Park, B. J., Min, K. S., Yeom, G. Y., Kirsch, P. D., & Jammy, R. (2011). Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching. In Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011 (pp. 80-81). Article 5872241 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2011.5872241

Kang, C. Y. ; Park, C. ; Park, B. J. et al. / Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching. Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011. 2011. pp. 80-81 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

@inproceedings{01a42f2df00449019d6760b6d2028ead,

title = "Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching",

abstract = "Metal gate/high-k LSTP CMOSFETs for sub-32nm technology was demonstrated using a novel-damage free neutral beam-assisted atomic etching process. Due to its neutralized atomic flux and chemical reaction, it had a high etch selectivity, oxygen concentration control and improved device performance /reliability. NBALE is a key process for reducing GIDL and Ioff control which is a key factor for LSTP.",

author = "Kang, \{C. Y.\} and C. Park and Park, \{B. J.\} and Min, \{K. S.\} and Yeom, \{G. Y.\} and Kirsch, \{P. D.\} and R. Jammy",

year = "2011",

doi = "10.1109/VTSA.2011.5872241",

language = "English",

isbn = "9781424484928",

series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",

pages = "80--81",

booktitle = "Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011",

note = "2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011 ; Conference date: 25-04-2011 Through 27-04-2011",

}

Kang, CY, Park, C, Park, BJ, Min, KS, Yeom, GY, Kirsch, PD & Jammy, R 2011, Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching. in Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011., 5872241, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, pp. 80-81, 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011, Hsinchu, Taiwan, Province of China, 25/04/11. https://doi.org/10.1109/VTSA.2011.5872241

Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching. / Kang, C. Y.; Park, C.; Park, B. J. et al.
Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011. 2011. p. 80-81 5872241 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kang, C. Y.

AU - Park, C.

AU - Park, B. J.

AU - Min, K. S.

AU - Yeom, G. Y.

AU - Kirsch, P. D.

AU - Jammy, R.

PY - 2011

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N2 - Metal gate/high-k LSTP CMOSFETs for sub-32nm technology was demonstrated using a novel-damage free neutral beam-assisted atomic etching process. Due to its neutralized atomic flux and chemical reaction, it had a high etch selectivity, oxygen concentration control and improved device performance /reliability. NBALE is a key process for reducing GIDL and Ioff control which is a key factor for LSTP.

AB - Metal gate/high-k LSTP CMOSFETs for sub-32nm technology was demonstrated using a novel-damage free neutral beam-assisted atomic etching process. Due to its neutralized atomic flux and chemical reaction, it had a high etch selectivity, oxygen concentration control and improved device performance /reliability. NBALE is a key process for reducing GIDL and Ioff control which is a key factor for LSTP.

UR - https://www.scopus.com/pages/publications/79959937856

U2 - 10.1109/VTSA.2011.5872241

DO - 10.1109/VTSA.2011.5872241

M3 - Conference contribution

AN - SCOPUS:79959937856

SN - 9781424484928

T3 - International Symposium on VLSI Technology, Systems, and Applications, Proceedings

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BT - Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011

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ER -

Kang CY, Park C, Park BJ, Min KS, Yeom GY, Kirsch PD et al. Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching. In Proceedings of 2011 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA 2011. 2011. p. 80-81. 5872241. (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). doi: 10.1109/VTSA.2011.5872241

Novel damage-free high-k removal for sub-32nm metal gate/high-k LSTP CMOSFETs using neutral beam-assisted atomic layer etching

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