Negative capacitance field-effect transistors based on ferroelectric AlScN and 2D MoS₂

Al_0.68Sc_0.32N (AlScN) has gained attention for its outstanding ferroelectric properties, including a high coercive field and high remnant polarization. Although AlScN-based ferroelectric field-effect transistors (FETs) for memory applications have been demonstrated, a device for logic applications with minimal hysteresis has not been reported. This study reports on the transport characteristics of a MoS₂ negative capacitance FET (NCFET) based on an AlScN ferroelectric material. We experimentally demonstrate the effect of a dielectric layer in the gate stack on the memory window and subthreshold swing (SS) of the NCFET. We show that the hysteresis behavior of transfer characteristics in the NCFET can be minimized with the inclusion of a non-ferroelectric dielectric layer, which fulfills the capacitance-matching condition. Remarkably, we also observe the NC effect in MoS₂/AlScN NCFETs arrays based on large-area monolayer MoS₂ synthesized by chemical vapor deposition, showing the SS values smaller than its thermionic limit (∼36 to 60 mV/dec) and minimal variation in threshold voltages (<20 mV).