Modeling of flip-chip interconnects using novel neural network approaches

Hoon Hwangbo, Jaehoon Lee, Wansoo Nah, Jinho Joo, Seung Boo Jung

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

In this paper, we present an efficient neural network approach to analyze the bump structure of flip-chip transitions. 3D FEM simulations are used to extract the network parameters such as s-parameters and then the equivalent lumped circuit model is used to extract L-C and R. Validation of the equivalent circuit model is conducted by the comparison between the circuit simulation and the full wave simulation. Using the extracted data, training sets of the neural networks are composed. The proposed neural network, in which all L-C and R parameters are used simultaneously at the one output layer, shows nice prediction performance for the s-parameter characteristics.

Original languageEnglish
Title of host publicationAPMC 2005
Subtitle of host publicationAsia-Pacific Microwave Conference Proceedings 2005
DOIs
StatePublished - 2005
EventAPMC 2005: Asia-Pacific Microwave Conference 2005 - Suzhou, China
Duration: 4 Dec 20057 Dec 2005

Publication series

NameAsia-Pacific Microwave Conference Proceedings, APMC
Volume2

Conference

ConferenceAPMC 2005: Asia-Pacific Microwave Conference 2005
Country/TerritoryChina
CitySuzhou
Period4/12/057/12/05

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