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Low temperature (≤ 380°C) and high performance Ge CMOS technology with novel source/drain by metal-induced dopants activation and HighFK/Metal gate stack for Monolithic 3D integration

  • Jin Hong Park
  • , Munehiro Tada
  • , Duygu Kuzum
  • , Pawan Kapur
  • , Hyun Yong Yu
  • , H. S.Philip Wong
  • , Krishna C. Saraswat
  • Stanford University
  • NEC Corporation

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

49   Link opens in a new tab Scopus citations

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