TY - JOUR
T1 - Investigation on Artificial Intelligence Hardware Architecture Design Based on Logic-in-Memory Ferroelectric Fin Field-Effect Transistor at Sub-3nm Technology Nodes
AU - Ra, Changho
AU - Kim, Huijun
AU - Park, Juhwan
AU - Youn, Gwanoh
AU - Lee, Uyong
AU - Heo, Junsu
AU - Park, Chester Sungchung
AU - Jeon, Jongwook
N1 - Publisher Copyright:
© 2024 The Author(s). Advanced Intelligent Systems published by Wiley-VCH GmbH.
PY - 2025/2
Y1 - 2025/2
N2 - With the advancement of artificial intelligence and internet of things, logic-in-memory (LiM) technology has garnered attention. This article presents research on LiM utilizing ferroelectric fin field-effect transistor (FinFET). Herein, the LiM characteristics of FinFET with hafnia-based switchable ferroelectric gate stack applied to the sub-3 nm future technology node are analyzed. This analysis is extended to the system level and its characteristics are observed. A compact model of the ferroelectric capacitor using Verilog-A is developed and the operation of LiM circuits such as 1-bit full adder, ternary content-addressable memory, and flip-flop by combining FinFET characteristics based on atomistic simulation with fabricated silicon-doped hafnium oxide characteristics is analyzed. Furthermore, by applying these ferroelectric devices, a power consumption reduction of 85.2% in the convolutional neural network accelerator at the system level is observed.
AB - With the advancement of artificial intelligence and internet of things, logic-in-memory (LiM) technology has garnered attention. This article presents research on LiM utilizing ferroelectric fin field-effect transistor (FinFET). Herein, the LiM characteristics of FinFET with hafnia-based switchable ferroelectric gate stack applied to the sub-3 nm future technology node are analyzed. This analysis is extended to the system level and its characteristics are observed. A compact model of the ferroelectric capacitor using Verilog-A is developed and the operation of LiM circuits such as 1-bit full adder, ternary content-addressable memory, and flip-flop by combining FinFET characteristics based on atomistic simulation with fabricated silicon-doped hafnium oxide characteristics is analyzed. Furthermore, by applying these ferroelectric devices, a power consumption reduction of 85.2% in the convolutional neural network accelerator at the system level is observed.
KW - convolutional neural network accelerators
KW - ferroelectrics
KW - fin field-effect transistors
KW - logic in memory
KW - simulations
UR - https://www.scopus.com/pages/publications/85203003546
U2 - 10.1002/aisy.202400370
DO - 10.1002/aisy.202400370
M3 - Article
AN - SCOPUS:85203003546
SN - 2640-4567
VL - 7
JO - Advanced Intelligent Systems
JF - Advanced Intelligent Systems
IS - 2
M1 - 2400370
ER -