Investigation of the W–TiN metal gate for metal–oxide–semiconductor devices

We have characterized the physical and electrical properties of a W–TiN stacked gate in metal–oxide–semiconductor devices. The degree of tungsten crystallization was enhanced when the [formula omitted] ratio was increased during TiN sputtering deposition and/or if the annealing temperature for W–TiN films was raised over 600 °C. However, the lowest resistivity was observed from W–TiN films annealed at 600 °C. We suggest that the [formula omitted] intermediate layer was formed between the TiN gate electrode and [formula omitted] if the annealing temperature increases to more than 600 °C. In addition, we found that TiN effectively suppresses the fluorine diffusion into [formula omitted] and that the [formula omitted] ratio determines the flatband voltage shift of the [formula omitted] capacitors.