Abstract
We present a systematic study of grain size and carrier mobility behaviour in polycrystalline graphene flms grown on copper substrates with various surface roughness values. We first observe that as the surface roughness of the substrate decreases, the graphene grain size increases significantly, thus decreasing the density of grain boundaries. Then, using field-effect transistor structures, we confirm that as the substrate roughness decreases, carrier mobility values in graphene increase, whatever the channel length of the transistor. For a substrate rms roughness around 5 nm (measured on a 10 × 10 μm2 field) and using a fast growth process (∼40 min), we obtain mobility values as high as ∼6900 cm2 Vs-1 for electrons and ∼6000 cm2 Vs-1 for holes in polycrystalline graphene with a small grain size of ∼12-14 μm.
| Original language | English |
|---|---|
| Article number | aa54d3 |
| Journal | Materials Research Express |
| Volume | 4 |
| Issue number | 1 |
| DOIs | |
| State | Published - Jan 2017 |
Keywords
- Graphene synthesis
- High carrier mobility values
- Low surface roughness
- Polished cu substrate