IGZO TFT Gate Driver Circuit With Improved Output Pulse

We propose a new gate driver circuit with an improved output pulse using depletion mode amorphous indium gallium zinc oxide thin film transistors. The previous reported gate driver circuit of our group has a weak point. It is that the peak voltage of the output pulse is decreased during the output pulse duration. A peak voltage drop of output pulse is larger by an increase the leakage current of the pull-down transistor as an increase of the threshold voltage (Vth) in the negative direction. Also, a power consumption is increase by that. In this paper, the new gate driver circuit is proposed to solve this weak point. The peak voltage drop of the output pulse of the new gate driver circuit is not occurred as an increase of the pull-down transistor Vth in the negative direction. The peak voltage of the output pulse of the previous reported circuit is 27.5 and 26.2 V at the transistor Vth of 0.5 and -2.9 V, respectively. However, the peak voltage of the output pulse of the new gate driver circuit is 27.8 and 27.6 V at the transistor Vth of 0.5 and -2.9 V, respectively.