High-speed low-power bootstrapped level converter for dual supply systems

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5 Scopus citations

Abstract

This paper proposes a high-speed and low-power bootstrapped level converter for dual-supply systems. The proposed level converter adopts a voltage bootstrapping at the gate of pull-down transistors to achieve improved driving speed and reduced contention problem. Simulation results in a 0.13-um CMOS process indicated that the proposed level converter reduces the propagation delay up to 64% and the power-delay product up to 49% as compared to conventional level converters.

Original languageEnglish
Title of host publicationProceedings of the 2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Pages871-874
Number of pages4
DOIs
StatePublished - 2010
Event2010 Asia Pacific Conference on Circuit and System, APCCAS 2010 - Kuala Lumpur, Malaysia
Duration: 6 Dec 20109 Dec 2010

Publication series

NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

Conference

Conference2010 Asia Pacific Conference on Circuit and System, APCCAS 2010
Country/TerritoryMalaysia
CityKuala Lumpur
Period6/12/109/12/10

Keywords

  • clustered voltage scaling
  • dual supply system
  • Level converter
  • voltage bootstrapping

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