High quality CVD TaN gate electrode for sub-100nm MOS devices

Y. H. Kim; C. H. Lee; T. S. Jeon; W. P. Bai; C. H. Choi; S. J. Lee; L. Xinjian; R. Clarks; D. Roberts; D. L. Kwong

High quality CVD TaN gate electrode for sub-100nm MOS devices

Y. H. Kim
, C. H. Lee
, T. S. Jeon
, W. P. Bai
, C. H. Choi
, S. J. Lee
, L. Xinjian
, R. Clarks
, D. Roberts
, D. L. Kwong

Schumacher

Research output: Contribution to journal › Conference article › peer-review

25 Scopus citations

Abstract

In this paper, for the first time, we present a detailed evaluation of physical and electrical properties of CVD TaN as a potential gate electrode material for sub-100nm MOS device applications. Our results show that CVD TaN films deposited using TBTDET (terbutylimidotrisdiethylamido tantalum) exhibit excellent thermal stability with underlying ultra thin SiO₂ up to 1000°C and extremely stable work function (5eV≡00∼1000°C) suitable for p-MOS device applications. Compared to PVD TaN, MOS devices with CVD TaN gate electrode show desirable work function for p-MOS devices, excellent stability of gate oxide thickness, leakage current, and interface properties during high-temperature annealing, and superior gate dielectric TDDB reliability. These results suggest that CVD TaN can be used as gate electrode on ultra thin gate oxide in self-aligned gate-first CMOS processing.

Original language	English
Pages (from-to)	667-670
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
State	Published - 2001
Externally published	Yes
Event	IEEE International Electron Devices Meeting IEDM 2001 - Washington, DC, United States Duration: 2 Dec 2001 → 5 Dec 2001

Cite this

@article{c4b4938bce754fbf83d4b76ce4437533,

title = "High quality CVD TaN gate electrode for sub-100nm MOS devices",

abstract = "In this paper, for the first time, we present a detailed evaluation of physical and electrical properties of CVD TaN as a potential gate electrode material for sub-100nm MOS device applications. Our results show that CVD TaN films deposited using TBTDET (terbutylimidotrisdiethylamido tantalum) exhibit excellent thermal stability with underlying ultra thin SiO2 up to 1000°C and extremely stable work function (5eV≡00∼1000°C) suitable for p-MOS device applications. Compared to PVD TaN, MOS devices with CVD TaN gate electrode show desirable work function for p-MOS devices, excellent stability of gate oxide thickness, leakage current, and interface properties during high-temperature annealing, and superior gate dielectric TDDB reliability. These results suggest that CVD TaN can be used as gate electrode on ultra thin gate oxide in self-aligned gate-first CMOS processing.",

author = "Kim, \{Y. H.\} and Lee, \{C. H.\} and Jeon, \{T. S.\} and Bai, \{W. P.\} and Choi, \{C. H.\} and Lee, \{S. J.\} and L. Xinjian and R. Clarks and D. Roberts and Kwong, \{D. L.\}",

year = "2001",

language = "English",

pages = "667--670",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Electron Devices Meeting IEDM 2001 ; Conference date: 02-12-2001 Through 05-12-2001",

}

TY - JOUR

T1 - High quality CVD TaN gate electrode for sub-100nm MOS devices

AU - Kim, Y. H.

AU - Lee, C. H.

AU - Jeon, T. S.

AU - Bai, W. P.

AU - Choi, C. H.

AU - Lee, S. J.

AU - Xinjian, L.

AU - Clarks, R.

AU - Roberts, D.

AU - Kwong, D. L.

PY - 2001

Y1 - 2001

N2 - In this paper, for the first time, we present a detailed evaluation of physical and electrical properties of CVD TaN as a potential gate electrode material for sub-100nm MOS device applications. Our results show that CVD TaN films deposited using TBTDET (terbutylimidotrisdiethylamido tantalum) exhibit excellent thermal stability with underlying ultra thin SiO2 up to 1000°C and extremely stable work function (5eV≡00∼1000°C) suitable for p-MOS device applications. Compared to PVD TaN, MOS devices with CVD TaN gate electrode show desirable work function for p-MOS devices, excellent stability of gate oxide thickness, leakage current, and interface properties during high-temperature annealing, and superior gate dielectric TDDB reliability. These results suggest that CVD TaN can be used as gate electrode on ultra thin gate oxide in self-aligned gate-first CMOS processing.

AB - In this paper, for the first time, we present a detailed evaluation of physical and electrical properties of CVD TaN as a potential gate electrode material for sub-100nm MOS device applications. Our results show that CVD TaN films deposited using TBTDET (terbutylimidotrisdiethylamido tantalum) exhibit excellent thermal stability with underlying ultra thin SiO2 up to 1000°C and extremely stable work function (5eV≡00∼1000°C) suitable for p-MOS device applications. Compared to PVD TaN, MOS devices with CVD TaN gate electrode show desirable work function for p-MOS devices, excellent stability of gate oxide thickness, leakage current, and interface properties during high-temperature annealing, and superior gate dielectric TDDB reliability. These results suggest that CVD TaN can be used as gate electrode on ultra thin gate oxide in self-aligned gate-first CMOS processing.

UR - https://www.scopus.com/pages/publications/17544391024

M3 - Conference article

AN - SCOPUS:17544391024

SN - 0163-1918

SP - 667

EP - 670

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - IEEE International Electron Devices Meeting IEDM 2001

Y2 - 2 December 2001 through 5 December 2001

ER -

High quality CVD TaN gate electrode for sub-100nm MOS devices

Abstract

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