High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate

T. E. Kazior; J. R. LaRoche; M. Urteaga; J. Bergman; M. J. Choe; K. J. Lee; T. Seong; M. Seo; A. Yen; D. Lubyshev; J. M. Fastenau; W. K. Liu; D. Smith; D. Clark; R. Thompson; M. T. Bulsara; E. A. Fitzgerald; C. Drazek; E. Guiot

doi:10.1109/CSICS.2010.5619670

High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate

T. E. Kazior, J. R. LaRoche, M. Urteaga, J. Bergman, M. J. Choe, K. J. Lee, T. Seong, M. Seo, A. Yen, D. Lubyshev, J. M. Fastenau, W. K. Liu, D. Smith, D. Clark, R. Thompson, M. T. Bulsara, E. A. Fitzgerald, C. Drazek, E. Guiot

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

14 Scopus citations

Abstract

In this work we present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).

Original language	English
Title of host publication	2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010
DOIs	https://doi.org/10.1109/CSICS.2010.5619670
State	Published - 2010
Externally published	Yes
Event	2010 32nd IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Monterey, CA, United States Duration: 3 Oct 2010 → 6 Oct 2010

Publication series

Name	Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC
ISSN (Print)	1550-8781

Conference

Conference	2010 32nd IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010
Country/Territory	United States
City	Monterey, CA
Period	3/10/10 → 6/10/10

Keywords

CMOS integrated circuits
Heterojunction bipolar transistors
Indium phosphide
Monolithic integrated circuits
Silicon

Access to Document

10.1109/CSICS.2010.5619670

Cite this

Kazior, T. E., LaRoche, J. R., Urteaga, M., Bergman, J., Choe, M. J., Lee, K. J., Seong, T., Seo, M., Yen, A., Lubyshev, D., Fastenau, J. M., Liu, W. K., Smith, D., Clark, D., Thompson, R., Bulsara, M. T., Fitzgerald, E. A., Drazek, C., & Guiot, E. (2010). High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate. In 2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010 Article 5619670 (Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC). https://doi.org/10.1109/CSICS.2010.5619670

Kazior, T. E. ; LaRoche, J. R. ; Urteaga, M. et al. / High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate. 2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010. 2010. (Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC).

@inproceedings{b9399835ef534cb68a9032658de3b6ef,

title = "High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate",

abstract = "In this work we present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100\% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).",

keywords = "CMOS integrated circuits, Heterojunction bipolar transistors, Indium phosphide, Monolithic integrated circuits, Silicon",

author = "Kazior, \{T. E.\} and LaRoche, \{J. R.\} and M. Urteaga and J. Bergman and Choe, \{M. J.\} and Lee, \{K. J.\} and T. Seong and M. Seo and A. Yen and D. Lubyshev and Fastenau, \{J. M.\} and Liu, \{W. K.\} and D. Smith and D. Clark and R. Thompson and Bulsara, \{M. T.\} and Fitzgerald, \{E. A.\} and C. Drazek and E. Guiot",

year = "2010",

doi = "10.1109/CSICS.2010.5619670",

language = "English",

isbn = "9781424474387",

series = "Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC",

booktitle = "2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010",

note = "2010 32nd IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 ; Conference date: 03-10-2010 Through 06-10-2010",

}

Kazior, TE, LaRoche, JR, Urteaga, M, Bergman, J, Choe, MJ, Lee, KJ, Seong, T, Seo, M, Yen, A, Lubyshev, D, Fastenau, JM, Liu, WK, Smith, D, Clark, D, Thompson, R, Bulsara, MT, Fitzgerald, EA, Drazek, C & Guiot, E 2010, High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate. in 2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010., 5619670, Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC, 2010 32nd IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010, Monterey, CA, United States, 3/10/10. https://doi.org/10.1109/CSICS.2010.5619670

High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate. / Kazior, T. E.; LaRoche, J. R.; Urteaga, M. et al.
2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010. 2010. 5619670 (Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate

AU - Kazior, T. E.

AU - LaRoche, J. R.

AU - Urteaga, M.

AU - Bergman, J.

AU - Choe, M. J.

AU - Lee, K. J.

AU - Seong, T.

AU - Seo, M.

AU - Yen, A.

AU - Lubyshev, D.

AU - Fastenau, J. M.

AU - Liu, W. K.

AU - Smith, D.

AU - Clark, D.

AU - Thompson, R.

AU - Bulsara, M. T.

AU - Fitzgerald, E. A.

AU - Drazek, C.

AU - Guiot, E.

PY - 2010

Y1 - 2010

N2 - In this work we present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).

AB - In this work we present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect length) as small as 2.5um. In DARPA COSMOS Phase 1 we designed and fabricated a differential amplifier that met the program Go/NoGo metrics with first pass design success. As the COSMOS Phase 2 demonstration vehicle we designed and fabricated a low power dissipation, high resolution, 500MHz bandwidth digital-to-analog converter (DAC).

KW - CMOS integrated circuits

KW - Heterojunction bipolar transistors

KW - Indium phosphide

KW - Monolithic integrated circuits

KW - Silicon

UR - https://www.scopus.com/pages/publications/78650127463

U2 - 10.1109/CSICS.2010.5619670

DO - 10.1109/CSICS.2010.5619670

M3 - Conference contribution

AN - SCOPUS:78650127463

SN - 9781424474387

T3 - Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC

BT - 2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010

T2 - 2010 32nd IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010

Y2 - 3 October 2010 through 6 October 2010

ER -

Kazior TE, LaRoche JR, Urteaga M, Bergman J, Choe MJ, Lee KJ et al. High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate. In 2010 IEEE Compound Semiconductor Integrated Circuit Symposium, CSICS 2010 - Technical Digest 2010. 2010. 5619670. (Technical Digest - IEEE Compound Semiconductor Integrated Circuit Symposium, CSIC). doi: 10.1109/CSICS.2010.5619670

High performance mixed signal circuits enabled by the direct monolithic heterogeneous integration of InP HBT and Si CMOS on a silicon substrate

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