Gate-oxide integrity for polysilicon thin-film transistors: A comparative study for ELC, MILC and SPC crystallized active polysilicon layer

In this paper, we present the results of Plasma-Enhanced Chemical Vapor Deposition gate-oxide (SiO ₂) integrity on ELC (excimer-laser- crystallized), MILC (metal-induced lateral-crystallized) and SPC (solid-phase-crystallized) polysilicon films. We observed that gate oxide strength of poly-Si TFT strongly depends on the crystallization method for the active silicon layer. In the case of ELC films, asperities on the silicon surface reduce the SiO ₂ breakdown field significantly. The metallic contaminants in MILC films are responsible for a deleterious impact on gate oxide integrity. Among the three cases, the SiO ₂ breakdown field was the highest for the SPC silicon films. The breakdown fields at the 50 % failure points in Weibull plots for the ELC, MILC and SPC cases were 5.1 MV/cm, 6.2 MV/cm, and 8.1 MV/cm, respectively. We conclude that the roughness and metallic contamination of the poly-Si films are the main factors that cause enhanced breakdown of SiO ₂ films.