FIDR: A scalable storage system for fine-grain inline data reduction with efficient memory handling

  • Mohammadamin Ajdari
  • , Wonsik Lee
  • , Pyeongsu Park
  • , Joonsung Kim
  • , Jangwoo Kim

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Storage systems play a critical role in modern servers which run highly data-intensive applications. To satisfy the high performance and capacity demands of such applications, storage systems now deploy an array of fast SSDs per server. To reduce the storage cost of employing many SSDs per server, storage systems actively perform inline data reduction (e.g., data deduplication, compression). Existing inline data reduction studies can achieve high performance and scalability by offloading computation-intensive data-reduction operations to dedicated hardware accelerators. However, such existing studies suffer from limited workload support and scalability. For example, they reduce only large data blocks, which incur many IO requests, leading to low data reduction rates, and their offloading overlooks memory-intensive operations, leading to the unoptimal scalability. In this paper, we propose FIDR, a highly scalable storage system to enable the inline data reduction of fine-grain data.We first identify key limitations of existing studies, and then set our scaling storage server design which effectively resolves the limitations by employing an optimal offloading mechanism. The key ideas of FIDR are to achieve high applicability by enabling fine-grain data reduction and high scalability by distributing data-reduction operations to optimal devices (e.g., host processor, accelerator, network interface card). The proposed offloading mechanism considers computation, memory capacity, and memory bandwidth requirements altogether. For evaluation, we implement an example FIDR system prototype using FPGAs. Our prototype system outperforms a current stateof- the-art data reduction system up to 3.3 times by significantly reducing both computation and memory resource requirements.

Original languageEnglish
Title of host publicationMICRO 2019 - 52nd Annual IEEE/ACM International Symposium on Microarchitecture, Proceedings
PublisherIEEE Computer Society
Pages239-252
Number of pages14
ISBN (Electronic)9781450369381
DOIs
StatePublished - 12 Oct 2019
Externally publishedYes
Event52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019 - Columbus, United States
Duration: 12 Oct 201916 Oct 2019

Publication series

NameProceedings of the Annual International Symposium on Microarchitecture, MICRO
ISSN (Print)1072-4451

Conference

Conference52nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2019
Country/TerritoryUnited States
CityColumbus
Period12/10/1916/10/19

Keywords

  • Compression
  • Deduplication
  • FPGA
  • Memory management
  • Small chunk
  • SSD array
  • Table management

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