Fermi-Level Unpinning Using a Ge-Passivated Metal-Interlayer-Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

  • Seung Hwan Kim
  • , Gwang Sik Kim
  • , Jeong Kyu Kim
  • , Jin Hong Park
  • , Changhwan Shin
  • , Changhwan Choi
  • , Hyun Yong Yu

Research output: Contribution to journalArticlepeer-review

15 Scopus citations

Abstract

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer-semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 1018 cm-3) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

Original languageEnglish
Article number7151781
Pages (from-to)884-886
Number of pages3
JournalIEEE Electron Device Letters
Volume36
Issue number9
DOIs
StatePublished - 1 Sep 2015

Keywords

  • Fermi level unpinning
  • gallium arsenide
  • Specific contact resistivity

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