Fermi-Level Pinning Free High-Performance 2D CMOS Inverter Fabricated with Van Der Waals Bottom Contacts

  • Tien Dat Ngo
  • , Zheng Yang
  • , Myeongjin Lee
  • , Fida Ali
  • , Inyong Moon
  • , Dong Gyu Kim
  • , Takashi Taniguchi
  • , Kenji Watanabe
  • , Kang Yoon Lee
  • , Won Jong Yoo

Research output: Contribution to journalArticlepeer-review

52 Scopus citations

Abstract

Effective control of 2D transistors polarity is a critical challenge in the process for integrating 2D materials into semiconductor devices. Herein, a doping-free approach for developing tungsten diselenide (WSe2) logic devices by utilizing the van der Waals (vdWs) bottom electrical contact with platinum and indium as the high and low work function metal respectively is reported. The device structure is free from chemical disorder and crystal defects arising from metal deposition, which enables a near ideal Fermi-level de-pinning. With effective controllability of device polarity through metal work function change, a complementary metal-oxide-semiconductor field effect transistor inverter with a gain of 198 at a bias voltage of 4.5 V is achieved. This study demonstrates an ultrahigh performance 2D inverter realized by controlling the device polarity from using Fermi-level pinning-free vdWs bottom contacts.

Original languageEnglish
Article number2001212
JournalAdvanced Electronic Materials
Volume7
Issue number5
DOIs
StatePublished - May 2021

Keywords

  • bottom contact
  • complementary metal-oxide-semiconductors
  • Fermi-level depinning
  • top-gate field-effect transistors
  • tungsten diselenide (WSe )

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