Fast implementation of Wyner-Ziv video codec using GPGPU

Ryanggeun Oh; Jongbin Park; Byeungwoo Jeon

doi:10.1109/ISBMSB.2010.5463150

Fast implementation of Wyner-Ziv video codec using GPGPU

Ryanggeun Oh
, Jongbin Park
, Byeungwoo Jeon

Department of Electronic and Electrical Engineering

Sungkyunkwan University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

Abstract

In this paper, we report a fast implementation of Wyner-Ziv video decoder using general-purpose computing on graphics processing units (GPGPU). Despite of its many advantages, Wyner-Ziv video coding has a problem of huge decoding complexity. Since Slepian-Wolf decoding with rate adaptive LDPC accumulate code takes up more than 90% of entire Wyner-Ziv video decoding complexity, in this paper, we focus on fast implementation of the Slepian-Wolf decoder using the CUDA (Compute Unified Device Architecture) which is a GPGPU architecture developed by NVIDIA. Our implementation is shown to be 4-5 times (QCIF size) or 15-20 times (CIF size) faster compared to conventional Slepian-Wolf decoding.

Original language	English
Title of host publication	IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme
DOIs	https://doi.org/10.1109/ISBMSB.2010.5463150
State	Published - 2010
Event	2010 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2010 - Shanghai, China Duration: 24 Mar 2010 → 26 Mar 2010

Publication series

Name	IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme

Conference

Conference	2010 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2010
Country/Territory	China
City	Shanghai
Period	24/03/10 → 26/03/10

Keywords

CUDA
GPGPU
Rate adaptive low density parity check code (LDPCA)
Wyner-Ziv video coding

Access to Document

10.1109/ISBMSB.2010.5463150

Cite this

Oh, R., Park, J., & Jeon, B. (2010). Fast implementation of Wyner-Ziv video codec using GPGPU. In IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme Article 5463150 (IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme). https://doi.org/10.1109/ISBMSB.2010.5463150

@inproceedings{c09e221adac943678628cf68fa57597b,

title = "Fast implementation of Wyner-Ziv video codec using GPGPU",

abstract = "In this paper, we report a fast implementation of Wyner-Ziv video decoder using general-purpose computing on graphics processing units (GPGPU). Despite of its many advantages, Wyner-Ziv video coding has a problem of huge decoding complexity. Since Slepian-Wolf decoding with rate adaptive LDPC accumulate code takes up more than 90\% of entire Wyner-Ziv video decoding complexity, in this paper, we focus on fast implementation of the Slepian-Wolf decoder using the CUDA (Compute Unified Device Architecture) which is a GPGPU architecture developed by NVIDIA. Our implementation is shown to be 4-5 times (QCIF size) or 15-20 times (CIF size) faster compared to conventional Slepian-Wolf decoding.",

keywords = "CUDA, GPGPU, Rate adaptive low density parity check code (LDPCA), Wyner-Ziv video coding",

author = "Ryanggeun Oh and Jongbin Park and Byeungwoo Jeon",

year = "2010",

doi = "10.1109/ISBMSB.2010.5463150",

language = "English",

isbn = "9781424444625",

series = "IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme",

booktitle = "IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme",

note = "2010 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2010 ; Conference date: 24-03-2010 Through 26-03-2010",

}

Oh, R, Park, J & Jeon, B 2010, Fast implementation of Wyner-Ziv video codec using GPGPU. in IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme., 5463150, IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme, 2010 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2010, Shanghai, China, 24/03/10. https://doi.org/10.1109/ISBMSB.2010.5463150

Fast implementation of Wyner-Ziv video codec using GPGPU. / Oh, Ryanggeun; Park, Jongbin; Jeon, Byeungwoo.
IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme. 2010. 5463150 (IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Fast implementation of Wyner-Ziv video codec using GPGPU

AU - Oh, Ryanggeun

AU - Park, Jongbin

AU - Jeon, Byeungwoo

PY - 2010

Y1 - 2010

N2 - In this paper, we report a fast implementation of Wyner-Ziv video decoder using general-purpose computing on graphics processing units (GPGPU). Despite of its many advantages, Wyner-Ziv video coding has a problem of huge decoding complexity. Since Slepian-Wolf decoding with rate adaptive LDPC accumulate code takes up more than 90% of entire Wyner-Ziv video decoding complexity, in this paper, we focus on fast implementation of the Slepian-Wolf decoder using the CUDA (Compute Unified Device Architecture) which is a GPGPU architecture developed by NVIDIA. Our implementation is shown to be 4-5 times (QCIF size) or 15-20 times (CIF size) faster compared to conventional Slepian-Wolf decoding.

AB - In this paper, we report a fast implementation of Wyner-Ziv video decoder using general-purpose computing on graphics processing units (GPGPU). Despite of its many advantages, Wyner-Ziv video coding has a problem of huge decoding complexity. Since Slepian-Wolf decoding with rate adaptive LDPC accumulate code takes up more than 90% of entire Wyner-Ziv video decoding complexity, in this paper, we focus on fast implementation of the Slepian-Wolf decoder using the CUDA (Compute Unified Device Architecture) which is a GPGPU architecture developed by NVIDIA. Our implementation is shown to be 4-5 times (QCIF size) or 15-20 times (CIF size) faster compared to conventional Slepian-Wolf decoding.

KW - CUDA

KW - GPGPU

KW - Rate adaptive low density parity check code (LDPCA)

KW - Wyner-Ziv video coding

UR - https://www.scopus.com/pages/publications/77953789289

U2 - 10.1109/ISBMSB.2010.5463150

DO - 10.1109/ISBMSB.2010.5463150

M3 - Conference contribution

AN - SCOPUS:77953789289

SN - 9781424444625

T3 - IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme

BT - IEEE International Symposium on Broadband Multimedia Systems and Broadcasting 2010, BMSB 2010 - Final Programme

T2 - 2010 IEEE International Symposium on Broadband Multimedia Systems and Broadcasting, BMSB 2010

Y2 - 24 March 2010 through 26 March 2010

ER -

Fast implementation of Wyner-Ziv video codec using GPGPU

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