Abstract
An approach for engineering the thickness of the SiO 2-based interfacial layer (IL) between metal oxide films and silicon after deposition of the metal oxide layer was described. The removal of the low-k interface layer was also investigated using electron microscopy and spectroscopic techniques. It was observed that a Ti overlayer, that exhibited a high oxygen solubility, gettered oxygen from the interface layer through an interposed metal oxide high-k layer and thus decomposing SiO 2 and reducing the interface layer thickness. An enhancement of the gate capacitance density, while retaining low leakage current densities, was observed from the interface-engineered high-k gate stacks.
| Original language | English |
|---|---|
| Pages (from-to) | 3467-3472 |
| Number of pages | 6 |
| Journal | Journal of Applied Physics |
| Volume | 96 |
| Issue number | 6 |
| DOIs | |
| State | Published - 15 Sep 2004 |
| Externally published | Yes |
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