Energy-Efficient Voltage-Induced Self-Regulated Precessional MRAM with Low Write Error Rate <10−9

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Voltage-controlled precessional MRAM offers a good power-performance-area balance, positioning it as a promising intermediate memory between SRAM, DRAM, and flash. However, its practical implementation is hindered by the need for highly precise timing control of the incoming voltage pulse, making it susceptible to process, temperature, and other variations, compromising its robustness for memory applications. This study proposes voltage-induced self-regulated precessional (VISP) memory to address this issue. By using angular dependence of MTJ’s resistance, energy asymmetry is created so that the precession is self-terminated without external control. The robustness of switching is evaluated using Fokker-Planck simulations, and it was found that write-error rate < 10−9 can be achieved with a pulse width of ∼ 26 nanoseconds, making VISP well-suited for storage-class memory.

Original languageEnglish
Title of host publication9th IEEE Electron Devices Technology and Manufacturing Conference
Subtitle of host publicationShaping the Future with Innovations in Devices and Manufacturing, EDTM 2025
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9798331504168
DOIs
StatePublished - 2025
Event9th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2025 - Hong Kong, Hong Kong
Duration: 9 Mar 202512 Mar 2025

Publication series

Name9th IEEE Electron Devices Technology and Manufacturing Conference: Shaping the Future with Innovations in Devices and Manufacturing, EDTM 2025

Conference

Conference9th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2025
Country/TerritoryHong Kong
CityHong Kong
Period9/03/2512/03/25

Keywords

  • MRAM
  • storage-class memory
  • VCMA

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