TY - GEN
T1 - Embedded multilayer interleaved comb capacitor for package-level EMI protection
AU - Huynh, Hai Au
AU - Han, Yongbong
AU - Hwang, Jisoo
AU - Song, Eunseok
AU - Kim, Soyoung
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/6/22
Y1 - 2018/6/22
N2 - This paper presents a new embedded multilayer interleaved comb (MIC) capacitor structure for package level and on-chip level electromagnetic interference (EMI) protection. The proposed structure can be implemented using multiple metal layers available in package and on-chip. In comparison with the traditional on-chip capacitor using metal planes, the proposed MIC capacitor has higher capacitance density by as much as 60%, while the parasitic resistance and inductance are lower. The mathematical models are developed to estimate the capacitance, parasitic inductance and resistance of MIC capacitor structure are presented. To validate the model, 3D field solver is used and a prototype of MIC capacitor is manufactured using the interconnect layers of 180nm CMOS process and the characteristics are measured.
AB - This paper presents a new embedded multilayer interleaved comb (MIC) capacitor structure for package level and on-chip level electromagnetic interference (EMI) protection. The proposed structure can be implemented using multiple metal layers available in package and on-chip. In comparison with the traditional on-chip capacitor using metal planes, the proposed MIC capacitor has higher capacitance density by as much as 60%, while the parasitic resistance and inductance are lower. The mathematical models are developed to estimate the capacitance, parasitic inductance and resistance of MIC capacitor structure are presented. To validate the model, 3D field solver is used and a prototype of MIC capacitor is manufactured using the interconnect layers of 180nm CMOS process and the characteristics are measured.
KW - Decoupling capacitor
KW - Embedded capacitor
KW - EMI filter
KW - Low-profile capacitor
UR - https://www.scopus.com/pages/publications/85050142120
U2 - 10.1109/ISEMC.2018.8393795
DO - 10.1109/ISEMC.2018.8393795
M3 - Conference contribution
AN - SCOPUS:85050142120
T3 - 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, EMC/APEMC 2018
SP - 345
EP - 349
BT - 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, EMC/APEMC 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 60th IEEE International Symposium on Electromagnetic Compatibility and 9th IEEE Asia-Pacific Symposium on Electromagnetic Compatibility, EMC/APEMC 2018
Y2 - 14 May 2018 through 18 May 2018
ER -