@inproceedings{22da52990c0447058d3c18f1694069b4,
title = "Electronic and geometric structure of one dimensional wires: An STM Study",
abstract = "Many device scientists believe that current Ultra Large Scale Integration (ULSI) technology will face technical and economic difficulties in further miniaturization. It has been predicted that 1-dimensional (1-D) transistors with connecting wires in three-dimensionally stacked structures may replace current field effect transistors in planar integration structures. We propose a new scheme to fabricate and integrate 1-D active devices. As a first step, we show the way to form 1-D wires with spatially variable electronic structures and the way to characterize them.",
author = "J. Lee and H. Kim and Song, \{Y. J.\} and Young Kuk",
year = "2005",
month = jun,
day = "30",
doi = "10.1063/1.1994399",
language = "English",
isbn = "0735402574",
series = "AIP Conference Proceedings",
pages = "902--904",
booktitle = "PHYSICS OF SEMICONDUCTORS",
note = "PHYSICS OF SEMICONDUCTORS: 27th International Conference on the Physics of Semiconductors, ICPS-27 ; Conference date: 26-07-2004 Through 30-07-2004",
}