Differential Injection Locked Frequency Divider With Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS

Akram Muhamad Muhamad Rafli; Muhammad Fakhri Mauludin; Sanghun Lee; Kunhee Cho; Jusung Kim

doi:10.1109/ACCESS.2025.3590205

Differential Injection Locked Frequency Divider With Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS

Akram Muhamad Muhamad Rafli, Muhammad Fakhri Mauludin, Sanghun Lee, Kunhee Cho, Jusung Kim

Department of Semiconductor Convergence Engineering

Research output: Contribution to journal › Article › peer-review

Abstract

This paper presents a 4.08 mW injection-locked frequency divider (ILFD) achieving division-by-4 with a 21.3% locking range (16.4-20.3 GHz) in 65 nm CMOS. The design employs dual CMOS Darlington pairs in a fully differential injection topology, simultaneously enhancing trans-conductance, switching speed, and power efficiency. Key innovations include a high-transit frequency (f_T) topology for robust high-frequency division and optimized harmonic rejection. Measured results show consistent 12 dB phase noise reduction (20·log₁₀(4)) across offsets up to 1 MHz, with harmonic rejection of 23.4 dB (3rd) and 49.3 dB (2nd) at 16.4 GHz. Competitive figures of merit of 0.95 GHz/mW and 19.4 GHz²/mW demonstrate state-of-the-art efficiency.

Original language	English
Pages (from-to)	127545-127557
Number of pages	13
Journal	IEEE Access
Volume	13
DOIs	https://doi.org/10.1109/ACCESS.2025.3590205
State	Published - 2025

Keywords

Darlington-cell
differential injection
injection-locked frequency divider (ILFD)
locking-range
transit frequency

Access to Document

10.1109/ACCESS.2025.3590205

Cite this

@article{9d733d26c1f14f318eb115b541405d32,

title = "Differential Injection Locked Frequency Divider With Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS",

abstract = "This paper presents a 4.08 mW injection-locked frequency divider (ILFD) achieving division-by-4 with a 21.3\% locking range (16.4-20.3 GHz) in 65 nm CMOS. The design employs dual CMOS Darlington pairs in a fully differential injection topology, simultaneously enhancing trans-conductance, switching speed, and power efficiency. Key innovations include a high-transit frequency (fT) topology for robust high-frequency division and optimized harmonic rejection. Measured results show consistent 12 dB phase noise reduction (20·log10(4)) across offsets up to 1 MHz, with harmonic rejection of 23.4 dB (3rd) and 49.3 dB (2nd) at 16.4 GHz. Competitive figures of merit of 0.95 GHz/mW and 19.4 GHz2/mW demonstrate state-of-the-art efficiency.",

keywords = "Darlington-cell, differential injection, injection-locked frequency divider (ILFD), locking-range, transit frequency",

author = "\{Muhamad Rafli\}, \{Akram Muhamad\} and Mauludin, \{Muhammad Fakhri\} and Sanghun Lee and Kunhee Cho and Jusung Kim",

note = "Publisher Copyright: {\textcopyright} 2013 IEEE.",

year = "2025",

doi = "10.1109/ACCESS.2025.3590205",

language = "English",

volume = "13",

pages = "127545--127557",

journal = "IEEE Access",

issn = "2169-3536",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

}

TY - JOUR

T1 - Differential Injection Locked Frequency Divider With Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS

AU - Muhamad Rafli, Akram Muhamad

AU - Mauludin, Muhammad Fakhri

AU - Lee, Sanghun

AU - Cho, Kunhee

AU - Kim, Jusung

PY - 2025

Y1 - 2025

N2 - This paper presents a 4.08 mW injection-locked frequency divider (ILFD) achieving division-by-4 with a 21.3% locking range (16.4-20.3 GHz) in 65 nm CMOS. The design employs dual CMOS Darlington pairs in a fully differential injection topology, simultaneously enhancing trans-conductance, switching speed, and power efficiency. Key innovations include a high-transit frequency (fT) topology for robust high-frequency division and optimized harmonic rejection. Measured results show consistent 12 dB phase noise reduction (20·log10(4)) across offsets up to 1 MHz, with harmonic rejection of 23.4 dB (3rd) and 49.3 dB (2nd) at 16.4 GHz. Competitive figures of merit of 0.95 GHz/mW and 19.4 GHz2/mW demonstrate state-of-the-art efficiency.

AB - This paper presents a 4.08 mW injection-locked frequency divider (ILFD) achieving division-by-4 with a 21.3% locking range (16.4-20.3 GHz) in 65 nm CMOS. The design employs dual CMOS Darlington pairs in a fully differential injection topology, simultaneously enhancing trans-conductance, switching speed, and power efficiency. Key innovations include a high-transit frequency (fT) topology for robust high-frequency division and optimized harmonic rejection. Measured results show consistent 12 dB phase noise reduction (20·log10(4)) across offsets up to 1 MHz, with harmonic rejection of 23.4 dB (3rd) and 49.3 dB (2nd) at 16.4 GHz. Competitive figures of merit of 0.95 GHz/mW and 19.4 GHz2/mW demonstrate state-of-the-art efficiency.

KW - Darlington-cell

KW - differential injection

KW - injection-locked frequency divider (ILFD)

KW - locking-range

KW - transit frequency

UR - https://www.scopus.com/pages/publications/105011159702

U2 - 10.1109/ACCESS.2025.3590205

DO - 10.1109/ACCESS.2025.3590205

M3 - Article

AN - SCOPUS:105011159702

SN - 2169-3536

VL - 13

SP - 127545

EP - 127557

JO - IEEE Access

JF - IEEE Access

ER -

Differential Injection Locked Frequency Divider With Dual Darlington Pairs for Wideband ÷4 Frequency Division in CMOS

Abstract

Keywords

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