Detection of Field Failure Chips by Ensemble Learned from Different Chip Areas

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Defect detection using machine learning techniques in semiconductor manufacturing has been known to be a very difficult problem owing to two issues: a very smaller number of defectives compared to the number of well-functioning chips and an invisible feature difference between fail and pass chips. The former corresponds to the class imbalance problem and the latter implies the class overlap in the context of classification. This research attempts to overcome these difficulties by proposing a new ensemble learned from different chip areas. Considering that physically close chips each other have similar characteristics, we split a wafer into radial and pie-shaped areas and construct an ensemble of classifiers, where each of those is learned from only one area data. The intuition behind this idea is that the fail and the pass classes can be separable in a specific area, which would be beneficial to successful failure detection. The numerical experiments based on three real world datasets from a semiconductor manufacturer verified the effectiveness of the proposed method.

Original languageEnglish
Title of host publication2021 IEEE Microelectronics Design and Test Symposium, MDTS 2021
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665424806
DOIs
StatePublished - 18 May 2021
Event30th IEEE Microelectronics Design and Test Symposium, MDTS 2021 - Virtual, Online
Duration: 18 May 202121 May 2021

Publication series

Name2021 IEEE Microelectronics Design and Test Symposium, MDTS 2021

Conference

Conference30th IEEE Microelectronics Design and Test Symposium, MDTS 2021
CityVirtual, Online
Period18/05/2121/05/21

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 9 - Industry, Innovation, and Infrastructure
    SDG 9 Industry, Innovation, and Infrastructure

Keywords

  • Chip area
  • Class imbalance
  • Ensemble learning
  • Field failure detection
  • Semiconductor manufacturing

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