Designing parity check matrix to achieve linear encoding time in LDPC codes

Low-density parity-check (LDPC) codes have become the part of various communication standards due to their excellent error correcting performance. Existing methods require matrix inverse computation for obtaining a systematic generator matrix from parity check matrix. With the change in code rate or code length the process is repeated and hence, a large number of pre-processing computations time and resources are required. In the existing methods, the complexity of encoding is essentially quadratic with respect to the block length. In this paper, it is shown that the parity check matrix can be constructed using patterned sub-matrix structure such that the matrix inverse operation is replaced by matrix multiplication of sparse matrices. The sparseness of matrices is then utilized to obtain efficient encoders which can achieve encoding in real time with reduced pre-computation complexity. Hardware implementation of encoder and simulation results show that the proposed encoder achieves throughput in excess of 1 Gbps with the same error correcting performance as the conventional designs.