Design of two-stage fully-integrated CMOS power amplifier for K-band applications

  • Hyunjun Kim
  • , Jongseok Bae
  • , Sungjae Oh
  • , Wonseob Lim
  • , Youngoo Yang

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This paper presents a K-band power amplifier integrated circuit using Samsung 65 nm CMOS process. The power amplifier adopts two-stage configuration for high power gain. The input, output, and inter-stage transformers are integrated. By neutralizing gate-drain capacitance using cross-coupled capacitors, the power gain and stability were improved. Its chip size is 0.78 × 0.62 mm2. The implemented two-stage power amplifier showed a power gain of 19.6 dB, a saturated output power of 13.5 dBm, and an efficiency of 7.19 % with a supply voltage of 1.1 V at the frequency band of 24 GHz.

Original languageEnglish
Title of host publication19th International Conference on Advanced Communications Technology
Subtitle of host publicationOpening Era of Smart Society, ICACT 2017 - Proceeding
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages493-496
Number of pages4
ISBN (Electronic)9788996865094
DOIs
StatePublished - 29 Mar 2017
Event19th International Conference on Advanced Communications Technology, ICACT 2017 - Pyeongchang, Korea, Republic of
Duration: 19 Feb 201722 Feb 2017

Publication series

NameInternational Conference on Advanced Communication Technology, ICACT
ISSN (Print)1738-9445

Conference

Conference19th International Conference on Advanced Communications Technology, ICACT 2017
Country/TerritoryKorea, Republic of
CityPyeongchang
Period19/02/1722/02/17

Keywords

  • CMOS power amplifier
  • Cross-coupled capacitor (CCC)
  • Differential power amplifier
  • Integrated circuit
  • K-band

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