@inproceedings{011480698c264168858547c2dccdc0bf,
title = "Design of Frequency Multiplier with Delay Locked Loop that is insensitive to PVT Variation and prescreen Harmonic Lock",
abstract = "As the wireless network market has been grown, high-performance and efficient communication technology are demanded for devices. Specifically, reference clock signal forms an essential part of designing devices such as wearable one or the Internet of Things. The conventional structure of XOR is used to multiply the reference frequency. The structure of DLL illustrates that how frequency is extracted from application based on various values of desired supply voltage.",
keywords = "Delay Locked Loop, Frequency Multiplier",
author = "Kim, \{Ho Won\} and Lee, \{Kang Yoon\}",
note = "Publisher Copyright: {\textcopyright} 2021 IEEE.; 12th International Conference on Ubiquitous and Future Networks, ICUFN 2021 ; Conference date: 17-08-2021 Through 20-08-2021",
year = "2021",
month = aug,
day = "17",
doi = "10.1109/ICUFN49451.2021.9528610",
language = "English",
series = "International Conference on Ubiquitous and Future Networks, ICUFN",
publisher = "IEEE Computer Society",
pages = "195--197",
booktitle = "ICUFN 2021 - 2021 12th International Conference on Ubiquitous and Future Networks",
}