Design of an Energy-Efficient Accelerator for Training of Convolutional Neural Networks using Frequency-Domain Computation

  • Jong Hwan Ko
  • , Burhan Mudassar
  • , Taesik Na
  • , Saibal Mukhopadhyay

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

Convolutional neural networks (CNNs) require high computation and memory demand for training. This paper presents the design of a frequency-domain accelerator for energy-efficient CNN training. With Fourier representations of parameters, we replace convolutions with simpler pointwise multiplications. To eliminate the Fourier transforms at every layer, we train the network entirely in the frequency domain using approximate frequency-domain nonlinear operations. We further reduce computation and memory requirements using sinc interpolation and Hermitian symmetry. The accelerator is designed and synthesized in 28nm CMOS, as well as prototyped in an FPGA. The simulation results show that the proposed accelerator significantly reduces training time and energy for a target recognition accuracy.

Original languageEnglish
Title of host publicationProceedings of the 54th Annual Design Automation Conference 2017, DAC 2017
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781450349277
DOIs
StatePublished - 18 Jun 2017
Externally publishedYes
Event54th Annual Design Automation Conference, DAC 2017 - Austin, United States
Duration: 18 Jun 201722 Jun 2017

Publication series

NameProceedings - Design Automation Conference
VolumePart 128280
ISSN (Print)0738-100X

Conference

Conference54th Annual Design Automation Conference, DAC 2017
Country/TerritoryUnited States
CityAustin
Period18/06/1722/06/17

Keywords

  • convolutional neural network (CNN)
  • frequency domain
  • training

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